Self-Timed Design in GaAs - Case Study of a High-Speed, Parallel Multiplier
Authors:
- V. ChandramouliVCV. Chandramouli
- E. BrunvandEBE. Brunvand
- K.F. SmithKSK.F. Smith
- 1 March 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol. 4 (1) , 146
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
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- MicropipelinesCommunications of the ACM, 1989
- Cascode voltage switch logic: A differential CMOS logic family1984