Charge Collection and Charge Sharing in a 130 nm CMOS Technology
Authors:
- Andrew L. SternbergASAndrew L. Sternberg
- Jeffrey D. BlackJBJeffrey D. Black
- Ronald D. SchrimpfRonald D. Schrimpf
Top Cited Papers
- 19 December 2006
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 53 (6) , 3253-3258
Abstract
Charge sharing between adjacent devices can lead to increased Single Event Upset (SEU) vulnerability. Key parameters affecting charge sharing are examined, and relative collected charge at the hit node and adjacent nodes are quantified. Results show that for a twin-well CMOS process, PMOS charge sharing can be effectively mitigated with the use of contacted guard-ring, whereas a combination of contacted guard-ring, nodal separation, and interdigitation is required to mitigate the NMOS charge sharing effect for the technology studiedKeywords
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