A trimming technique for capacitive SAR ADC as sensor interface
Authors:
- Ke LiuKLKe Liu
- Zhankun DuZDZhankun Du
- Li ShaoLSLi Shao
- Xiao MaXMXiao Ma
- 1 December 2015
- journal article
- Published by IOP Publishing in Journal of Semiconductors
- Vol. 36 (12) , 125004
Abstract
This work presented a trimming technique and algorithm applied in a capacitive successive approximation register (SAR) analog to digital converter (ADC) for a sensor interface, which can be integrated with the preceding sensor and the following controlling circuit. Without spending a special calibration phase or adding complicated functions, this circuit keeps a 12-bit resolution by trimming the capacitor array. Its merits of low power and small area make it suitable to be embedded in a power and cost sensitive system such as a battery-supplied sensor network node. The prototype 12-bit ADC is implemented by 0.5 μm 2P3M CMOS technology, with the wide supply range of 2–5 V, its power consumption is only 300 μA at a sampling speed of 200 kHz.Keywords
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