Parallel Time Batching: Systolic-Array Acceleration of Sparse Spiking Neural Computation
Authors:
- 1 April 2022
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 317-330
Abstract
Spiking Neural Networks (SNNs) are brain- inspired computing models incorporating unique temporal dynamics and event-driven processing. Rich dynamics in both space and time offer great challenges and opportunities for efficient processing of sparse spatiotemporal data compared with conventional artificial neural networks (ANNs). Specifically, the additional overheads for handling the added temporal dimension limit the computational capabilities of neuromorphic accelerators. Iterative processing at every time-point with sparse inputs in a temporally sequential manner not only degrades the utilization of the systolic array but also intensifies data movement.In this work, we propose a novel technique and architecture that significantly improve utilization and data movement while efficiently handling temporal sparsity of SNNs on systolic arrays. Unlike time-sequential processing in conventional SNN accelerators, we pack multiple time points into a single time window (TW) and process the computations induced by active synaptic inputs falling under several TWs in parallel, leading to the proposed parallel time batching. It allows weight reuse across multiple time points and enhances the utilization of the systolic array with reduced idling of processing elements, overcoming the irregularity of sparse firing activities. We optimize the granularity of time-domain processing, i.e., the TW size, which significantly impacts the data reuse and utilization. We further boost the utilization efficiency by simultaneously scheduling non-overlapping sparse spiking activities onto the array. The proposed architectures offer a unifying solution for general spiking neural networks with commonly exhibited temporal sparsity, a key challenge in hardware acceleration, delivering 248X energy-delay product (EDP) improvement on average compared to an SNN baseline for accelerating various networks. Compared to ANN based accelerators, our approach improves EDP by 47X on the CIFAR10 dataset.Keywords
This publication has 39 references indexed in Scilit:
- CIFAR10-DVS: An Event-Stream Dataset for Object ClassificationFrontiers in Neuroscience, 2017
- Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural NetworksIEEE Journal of Solid-State Circuits, 2016
- EIEACM SIGARCH Computer Architecture News, 2016
- Neuromorphic accelerators2015
- TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic ChipIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015
- A Digital Liquid State Machine With Biologically Inspired Learning and Its Application to Speech RecognitionIEEE Transactions on Neural Networks and Learning Systems, 2015
- HFirst: A Temporal Approach to Object RecognitionIEEE Transactions on Pattern Analysis and Machine Intelligence, 2015
- Spiking Deep Convolutional Neural Networks for Energy-Efficient Object RecognitionInternational Journal of Computer Vision, 2014
- A Review of the Integrate-and-fire Neuron Model: I. Homogeneous Synaptic InputBiological Cybernetics, 2006
- Networks of spiking neurons: The third generation of neural network modelsNeural Networks, 1997