Modeling and analysis of substrate coupling in integrated circuits
Authors:
- R. GharpureyRGR. Gharpurey
- R.G. MeyerRMR.G. Meyer
- 1 March 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 31 (3) , 344-353
Abstract
Modeling and Analysis of Substrate Coupling in Integrated CircuitsbyRanjit GharpureyDoctor of Philosophy in EngineeringElectrical Engineering and Computer SciencesUniversity of California at BerkeleyProfessor Robert G. Meyer, ChairSubstrate coupling in integrated circuits is the process whereby parasitic current flow in the substrateelectrically couples devices in different parts of the circuit. Higher levels of integration and higher frequenciesof operation make the coupling more...Keywords
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