Gate Bias Effects on Hydrogen-Terminated Polycrystalline Diamond FETs
- 6 December 2023
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 71 (1) , 406-411
Abstract
In this article, gate bias ( $\textit{V}_{\text{GS},\text{stress}}\text{)}$ effects on the hydrogen (H)-terminated polycrystalline diamond field effect transistors (FETs) are investigated. A 7-to 8-nm AlO $_{\text{x}}$ interface layer is found between the Al metal and polycrystalline diamond by electrical and microstructure characterization. The threshold voltage ( $\textit{V}_{\text{TH}}\text{)}$ and ON-resistance ( $\textit{R}_{\text{on}}\text{)}$ exhibit different changing trends under varying $\textit{V}_{\text{GS},\text{stress}}$ . Specifically, a bidirectional shift of $\textit{V}_{\text{TH}}$ is observed during gate bias stress. To explain the distinct behavior of $\textit{V}_{\text{TH}}$ shift and $\textit{R}_{\text{ON}}$ change occurring under gate bias, holes trapping by defects, H-motion, and surface leakage electron trapping models are proposed. Under negative gate bias, holes in 2-D hole gas channel are captured by the interface states and/or defects in the AlO $_{\text{x}}$ layer, resulting in a negative shift of V $_{\text{TH}}$ . Simultaneously, H-motion in the AlOx layer under gate bias leads to the generation of negative charges. Additionally, electrons in the surface leakage path are trapped by defects on the diamond surface in the access region, leading to decreased access region resistance. For a harsh gate bias, a high density of new defects is generated, and a defect density changes from 4.9 $\times$ 10 $^{\text{21}}$ ev $^{-\text{1}}$ cm $^{-\text{3}}$ for the fresh device to 5.1 $\times$ 10 $^{\text{23}}$ ev $^{-\text{1}}$ cm $^{-\text{3}}$ for the device after gate bias ( $\textit{V}_{\text{GS},\text{stress}}$ $=$ $-$ 4 V) which is characterized by using the low-frequency noise measurements. These findings highlight the importance of surface passivation and high-quality gate dielectric in suppressing charging effects and new defect generation in H-terminated polycrystalline diamond FETs, ultimately contributing to device stability.Keywords
Funding Information
- National Natural Science Foundation of China (62204060)
- Guangzhou Basic and Applied Basic Research Project (202201010868)
This publication has 36 references indexed in Scilit:
- Composition and bonding structure of plasma‐assisted ALD Al2O3 filmsphysica status solidi (c), 2010
- Surface transfer doping of semiconductorsProgress in Surface Science, 2009
- 2 W/mm output power density at 1 GHz for diamond FETsElectronics Letters, 2005
- Origin of Surface Conductivity in DiamondPhysical Review Letters, 2000
- Hall Effect Measurements of Surface Conductive Layer on Undoped Diamond Films in NO2 and NH3 AtmospheresJapanese Journal of Applied Physics, 1999
- High-preformance diamond surface-channel field-effect transistors and their operation mechanismDiamond and Related Materials, 1999
- Hydrogen-related defects in polycrystalline CVD diamondPhysical Review B, 1996
- Improved Analysis of Low Frequency Noise in Field-Effect MOS TransistorsPhysica Status Solidi (a), 1991
- A 1/f noise technique to extract the oxide trap density near the conduction band edge of siliconIEEE Transactions on Electron Devices, 1989
- Chemistry of Si-SiO2 interface trap annealingJournal of Applied Physics, 1988