Blade computing with the AMD Opteron™ processor ("magny-cours")

Authors:

1 August 2009

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 1-19
DOI:10.1109/hotchips.2009.7478349

Abstract

Presents a collection of slides covering the following topics: AMD Opteron processor; x86 64-bit architecture evolution; Magny-Cours silicon; MCM 2.0 logical view; HyperTransport technology; HT assist; probe filter entry; cache coherence protocol; probe filter transaction scenarios; probe filter coverage ratio; and memory latency.

Keywords

PROGRAM PROCESSORS
COMPUTER ARCHITECTURE
INSTRUCTION SETS
MICROPROCESSORS
SCALABILITY