A sparse spin qubit array with integrated control electronics
Authors:
- 1 December 2019
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 31.4.1-31.4.4
Abstract
Current implementations of quantum computers suffer from large numbers of control lines per qubit, becoming unmanageable with system scale up. Here, we discuss a sparse spin-qubit architecture featuring integrated control electronics significantly reducing the off-chip wire count. This quantum-classical hardware integration closes the feasibility gap towards a CMOS quantum computer.Keywords
This publication has 18 references indexed in Scilit:
- Silicon CMOS architecture for a spin-based quantum computerNature Communications, 2017
- Interfacing spin qubits in quantum dots and donors—hot, dense, and coherentnpj Quantum Information, 2017
- A CMOS silicon spin qubitNature Communications, 2016
- 20nm DRAM: A new beginning of another revolution2015
- An addressable quantum dot qubit with fault-tolerant control-fidelityNature Nanotechnology, 2014
- Electrical control of a long-lived spin qubit in a Si/SiGe quantum dotNature Nanotechnology, 2014
- Silicon quantum electronicsReviews of Modern Physics, 2013
- Surface code quantum computing by lattice surgeryNew Journal of Physics, 2012
- Micromagnets for coherent control of spin-charge qubit in lateral quantum dotsApplied Physics Letters, 2007
- Quantum computation with quantum dotsPhysical Review A, 1998