Time-Triggered Co-Scheduling of Computation and Communication with Jitter Requirements

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Abstract
The complexity of embedded application design is increasing with growing user demands. In particular, automotive embedded systems are highly complex in nature, and their functionality is realized by a set of periodic tasks. These tasks may have hard real-time requirements and communicate over an interconnect. The problem is to efficiently co-schedule task execution on cores and message transmission on the interconnect so that timing constraints are satisfied. Contemporary works typically deal with zero-jitter scheduling, which results in lower resource utilization, but has lower memory requirements. This article focuses on jitter-constrained scheduling that puts constraints on the tasks jitter, increasing schedulability over zero-jitter scheduling. The contributions of this article are: 1) Integer Linear Programming and Satisfiability Modulo Theory model exploiting problem-specific information to reduce the formulations complexity to schedule small applications. 2) A heuristic approach, employing three levels of scheduling scaling to real-world use-cases with 10,000 tasks and messages. 3) An experimental evaluation of the proposed approaches on a case-study and on synthetic data sets showing the efficiency of both zero-jitter and jitter-constrained scheduling. It shows that up to 28 percent higher resource utilization can be achieved by having up to 10 times longer computation time with relaxed jitter requirements.
Funding Information
  • European Union's Horizon 2020 research and innovation programme (688860)
  • Eaton European Innovation Centre
  • National Funds through FCT/MEC
  • Portuguese Foundation for Science and Technology
  • ERDF
  • European Regional Development Fund
  • PT2020 Partnership (UID/CEC/04234/2013)
  • CISTER Research Centre
  • FCT/MEC
  • EU ARTEMIS JU within project(s) (ARTEMIS/0001/2013-JU, 621429 (EMC2))

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