A Simple Edge Termination Design for Vertical GaN P-N Diodes

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Abstract
Vertical power devices require significant attention to their edge termination designs to obtain higher breakdown voltages without substantial increase in ON-state resistance. A simple edge termination structure for a GaN p-n diode is proposed, comprising a full layer lightly doped p-type GaN region underneath the higher doped ${p} +\!+$ contact layer. A TCAD model of the device is developed, and removal of the portions of ${p}$ ++ cap outside of the device active area in simulations is shown to increase the device blocking voltage capability. It causes the depletion width to increase in the lightly doped p-type layer and allows it to act similar to a junction termination extension (JTE). These predictions are validated empirically, resulting in a 52% measured increase in breakdown capability after selective removal of the ${p}$ ++ cap. This simple edge termination technique can be formed with only a single low-energy nitrogen implant or etching procedure, greatly increasing its manufacturability over more complex structures. Design optimization studies are pursued in TCAD to determine optimal parameter values for further improving breakdown performance. It is shown that the proposed edge termination technique can be employed to produce future high voltage vertical GaN devices without a significant gain in ON-state resistance and with wide tolerance to process variations.
Funding Information
  • U.S. Office of Naval Research at the University of Toledo (N00014-21-1-2832)
  • U.S. Naval Research Laboratory through the U.S. Office of Naval Research
  • Sandia National Laboratories through the ARPA-E’s OPEN+ Kilovolt Devices Cohort

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