A Novel Program Operation Scheme With Negative Bias in 3-D NAND Flash Memory

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Abstract
In this article, we proposed a new program operation scheme to overcome the degradation of program window in scaling down of 3-D NAND flash memory. First, we investigated natural ${V}_{\text {th}}$ shift (NVS) effect in scaled-down structure and confirmed that this effect occurs due to an increase in fringe field by adjacent read voltage. Second, we investigated programmed and erased ${V}_{\text {th}}$ window with scaling down and confirmed that programmed and erased ${V}_{\text {th}}$ is decreased significantly due to the NVS effect. To overcome this scaling effect, we proposed a new program operation scheme using negative bias. The proposed scheme not only improves the program window margin but also achieves voltage scaling. In addition, the proposed scheme enables multistring operation through improved self-boosting, which is a compatible scheme in full array level.
Funding Information
  • Ministry of Trade, Industry and Energy (20003808)
  • Korea Semiconductor Research Consortium (KSRC) Support Program for the Development of the Future Semiconductor Device

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