Analysis of Transmission Lines on Integrated-Circuit Chips
Authors:
- I.T. HoIHI.T. Ho
- S.K. MullickSMS.K. Mullick
- 1 December 1967
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 2 (4) , 201-208
Abstract
The availability of very fast semiconductor switching devices and the possibilities of large scale integration have increased the importance of the interconnection problem for the design of high-speed computers. The interconnection delay represents a fundamental boundary which limits the ultimate speed of logic circuits. The transmission-line behavior of interconnections on integrated-circuit chips, especially for subnanosecond applications, is the prime concern of this paper. A lumped circuit model is proposed and justified on physical and experimental grounds. It is shown that interconnections behave like RC transmission lines at low frequencies, with the effect of inductance showing up at midrange and high frequencies. Some simple formulas are included for design use.Keywords
This publication has 6 references indexed in Scilit:
- Picosecond pulse response of interconnections in a common substrate monolithic system1967
- Transmission-Line Properties of Parallel Strips Separated by a Dielectric SheetIEEE Transactions on Microwave Theory and Techniques, 1965
- The method of estimating delay in switching circuits and the figure of merit of a switching transistorIEEE Transactions on Electron Devices, 1964
- Transmission-Line Response Using Frequency TechniquesIBM Journal of Research and Development, 1964
- An investigation into some fundamental properties of strip transmission lines with the aid of an electrolytic tankProceedings of the IEE - Part B: Radio and Electronic Engineering, 1956
- The Transient Response of Damped Linear Networks with Particular Regard to Wideband AmplifiersJournal of Applied Physics, 1948