A 150nW, 5ppm/o C, 100kHz On-Chip clock source for ultra low power SoCs
Authors:
- 1 September 2012
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 08865930,p. 1-4
Abstract
This paper presents an ultra low power clock source using a 1μW temperature compensated on-chip digitally controlled oscillator (Osc CMP ) and a 100nW uncompensated oscillator (Osc UCMP ) with respective temperature stabilities of 5ppm/°C and 1.67%/°C. A fast locking circuit re-locks Osc UCMP to Osc CMP often enough to achieve a high effective temperature stability. Measurements of a 130nm CMOS chip show that this combination gives a stability of 5ppm/°C from 20°C to 40°C (14ppm/°C from 20°C to 70°C) at 150nW if temperature changes by 1°C or less every second. This result is 7X lower power than typical XTALs and 6X more stable than prior on-chip solutions.Keywords
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