Synaptic Devices Based on 3-D AND Flash Memory Architecture for Neuromorphic Computing

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Abstract
A new 3-D synaptic device with stackable AND-type Rounded Dual Channel (RDC) flash memory architecture is proposed for neuromorphic computing. The RDC flash devices operate at low power by using the FN program/erase method, utilizes a high speed by a parallel read operation, and performs in a high density with multi-layer stacking. Key fabrication steps are explained and the successful operation of the device in 3-D stacked structure is verified by device simulation. In addition, devices are fabricated by stacking three layers, and their operation is confirmed.