Scaling Package Interconnects Below 20µm Pitch with Hybrid Bonding

Authors:
  • GGGuilian Gao
    Guilian Gao
  • LMLaura Mirkarimi
    Laura Mirkarimi
  • GFGill Fountain
    Gill Fountain
  • LWLiang Wang
    Liang Wang
  • CUCyprian Uzoh
    Cyprian Uzoh
  • TWThomas Workman
    Thomas Workman
  • GGGabe Guevara
    Gabe Guevara
  • CMChandrasekhar Mandalapu
    Chandrasekhar Mandalapu
  • BLBongsub Lee
    Bongsub Lee
  • RKRajesh Katkar
    Rajesh Katkar
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Abstract
The low-temperature direct bond interconnect commonly referred to as hybrid bonding technology is a promising solution for achieving an interconnect pitch smaller than 40μm. Wafer-to-wafer (W2W) direct bond interconnect technology has been in high volume manufacturing for several years. This paper presents the latest development for extending this technology from W2W to die-to-wafer (D2W) and die-to-die (D2D) applications. Daisy chain die with direct bond interconnect layers on either one or both surfaces are designed with a similar size to a high bandwidth dynamic random access memory (HBM DRAM) die, 7.96 mm x 11.96 mm. The longest daisy chain structure has 31,356 links and covers an active area of 5.36mm x 9.36mm. The bonding pitch ranges from 10 to 40 μm with a pad diameter of either 5 or 10 μm. The paper addresses the critical issues in bringing direct bond interconnect into a manufacturing environment with a D2W or D2D assembly flow while sharing the latest results. The assembly topics addressed here include extension of CMP to 10 μm pads, dicing, surface preparation for the direct bonding in a pick and place tool. The dies bond to a full-thickness host wafer integrated with a mating daisy chain to demonstrate electrical connectivity. Bond quality is characterized with C-mode scanning acoustic microscopy (CSAM), electrical resistance measurement, and cross-section microscopy analysis. Electrical test yield as high as 92% on the full daisy chain is achieved. Bonded parts have showed superior reliability in the JEDEC standard thermal cycling and high temperature storage testing.