ESOP-based Toffoli Gate Cascade Generation
- 1 August 2007
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 15555798,p. 206-209
Abstract
An ESOP-based Toffoli gate cascade synthesis algorithm is presented. The algorithm is capable of generating a cascade of reversible gates for logic functions with large numbers of qubits. The algorithm is fast as it uses a simple cost metric heuristic during a recursive divide-and-conquer function to determine NOT and Toffoli gate placement.Keywords
This publication has 4 references indexed in Scilit:
- An Algorithm for Synthesis of Reversible Logic CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006
- Introduction to reversible computing2005
- Synthesis of reversible logic circuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2003
- Irreversibility and Heat Generation in the Computing ProcessIBM Journal of Research and Development, 1961