Modified Asymmetrical H-Bridge MLI With Minimum Switching Loss and Harmonic Distortion Using JAYA Algorithm
Open Access
- 28 May 2024
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 12, 78854-78864
Abstract
This paper proposes a modified structure of reduced switch count H-Bridge Multilevel inverter (MLI) which comes with an advantages of higher voltage level, lower switching loss and lower number of components. This developed topology of MLI can generate 15-level output voltage with only three number of DC voltage sources and ten power devices. In order to generate the higher voltage level in analogy to the conventional Multilevel inverter asymmetrical input voltage sources are used which reduced the number of power devices input voltage sources and driver circuits. To mitigate the voltage and current harmonics from the output of the MLI JAYA algorithm is employed. This algorithm resulted 2.5% total harmonic distortion (THD) for three phase system and 5.2% THD for single phase system by developing suitable switching angles with rapid acceleration and reduces the computational burden. The efficacy of the algorithm has been justified by the comparison study with most popular swarm based algorithms known as particle swarm optimization (PSO) and Genetic algorithm (GA). The performance of the reduced MLI has been studied by developing a prototype for single phase and three phase in both MATLAB Simulink environment and experimental setup.Keywords
This publication has 24 references indexed in Scilit:
- Lower Output Voltage Harmonics With Optimum Switching Angles of Single PV-Source Based Reduced Switch Multilevel Inverter Using BWO AlgorithmIEEE Access, 2024
- A 7L and 11L High Step-Up SCMLI Topology With Reduced Component Voltage StressIEEE Access, 2023
- An Improved Artificial Neural Network-Based Approach for Total Harmonic Distortion Reduction in Cascaded H-Bridge Multilevel InvertersIEEE Access, 2023
- A Reduced Switch Count Multilevel Inverter for PV Standalone System using Modified JAYA AlgorithmInternational Journal of Electronics, 2023
- An effective shunt active power filter based on novel binary multilevel inverter and optimal type-2 fuzzy system to accurately mitigate harmonic currentsEvolving Systems, 2022
- A new cascaded asymmetrical multilevel inverter based on switched dc voltage sourcesInternational Journal of Electrical Power & Energy Systems, 2021
- Comparative analysis of symmetric and asymmetric reduced switch MLI topologies using unipolar pulse width modulation strategiesIET Power Electronics, 2016
- Cross‐switched multilevel inverter: an innovative topologyIET Power Electronics, 2013
- Harmonics elimination in a multilevel inverter using the particle swarm optimisation techniqueIET Power Electronics, 2009
- An application of PSO technique for harmonic elimination in a PWM inverterApplied Soft Computing, 2009