Proteus: Heterogeneous FPGA Virtualization

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Abstract
Cloud providers have widely adopted FPGAs to meet the high-performance, energy-efficient demands of cloud workloads. While they offer homogeneous FPGAs per service, recent FPGA products exhibit increasing heterogeneity in terms of vendors, capacity, off-chip memory, and performance. These diverse properties not only render applications incompatible across different FPGAs but also lead to performance disparities and resource inefficiency. To fill these gaps, we propose Proteus, a heterogeneous FPGA virtualization framework. Proteus allows applications to manage diverse FPGAs transparently by abstracting their properties with four key contributions: an FPGA virtualization stack to abstract different FPGA stacks from applications, a platform-agnostic API to manage FPGAs regardless of their vendors/architectures, memory virtualization to optimize memory allocation depending on the off-chip memory type, and a performance-aware scheduler to deploy applications on the best-suited FPGAs based on their predicted performance. We implement Proteus for cross-vendor FPGAs: AMD (U50, U280) and Intel (Stratix 10). Our evaluation highlights that Proteus makes applications deployable on any FPGA with 4.9–6.8% overheads for AMD FPGAs, and the performance-aware scheduler yields 13.8% throughput gain on average.
Funding Information
  • European Research Council (101077577)
  • HORIZON EUROPE Digital, Industry and Space (101140087)
  • Bundesministerium für Forschung, Technologie und Raumfahrt (16KISK002)

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