Modeling the gate driver IC for GaN transistor: A black-box approach

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Abstract
During the switching performance evaluation for Si-based power devices, the gate driver IC's are commonly neglected because of Si device's slow switching speed. GaN transistors, with much smaller intrinsic capacitances, would enable faster switching speed and higher switching frequency. Consequently, the gate driver would largely impact the switching performance as well as the dead-time of the GaN transistor. In previous works, however, the gate driver IC used to drive GaN transistor have been ignored in circuit simulation, leading to lower modeling accuracy. In consideration of the lack of gate driver IC's critical design parameters, along with less familiarity of power electronics engineer/researcher with the semiconductor technologies, the gate driver IC could be regarded as a “black-box”. Despite the difficulty in directly performing measurements inside the driver chip package, a black-box modeling method could be proposed. Based on the measured terminal current/voltage signals in a typical gate drive scheme, the I-V characteristics of the PMOS in the totem-pole topology could be extracted. With respect to the C-V curves, the characteristics of a discrete Si MOSFET with comparable voltage/current rating could be introduced. Taking into account the operating principle of the totem-pole topology, a circuit-level model could be established. Consequently, the simulated waveforms are in reasonable agreements with the testing results. Taking advantages of the proposed black-box modeling method, the switching transient waveforms as well as the dead-time of GaN transistor could be more accurately evaluated.