Abstract
This paper presents a novel current-fed multiport DC–DC converter (MP-DC) featuring a switched capacitor assisted three-phase interleaved architecture at the low-voltage port to mitigate current and voltage ripples in both inductors and capacitors. By integrating the nonisolated boost and isolated LLC units into a single-stage architecture, the proposed converter enables galvanic isolation for the EV battery, while achieving high efficiency and a high voltage conversion ratio between the ESS and the DC bus. The interleaved boost and LLC resonant stages share primary-side components, reducing the number of active switches and improving system compactness. By jointly applying pulse-width modulation (PWM) and pulse-frequency modulation (PFM), the isolated LLC unit yields a high step-up ratio, while the voltage conversion ratio of the nonisolated stage is effectively decoupled from the switching frequency, enhancing control flexibility. Moreover, an asymmetric duty-cycle limit control (A-DLC) scheme is further proposed to regulate the LLC input voltage under two- or three-level waveform modes and maintain balanced low-voltage side inductor currents. Accordingly, the operating principles, current ripple and power distribution characteristics, and design guidelines are analyzed in detail. Finally, a 2 kW prototype with 48 V /400 V /800 V ports validates the analysis, achieving peak efficiencies of 98.1% and 98.5% in forward and backward operations, respectively. These results confirm that the proposed MP-DC provides a compact and efficient solution for ESS – DC bus – EV integration in DC microgrid (DCMG) applications, offering advantages over conventional two-stage multiport converters.
Funding Information
  • JSPS KAKENHI (JP25K01216)

This publication has 39 references indexed in Scilit: