Exploring Innovative IGZO-channel based DRAM Cell Architectures and Key Technologies for Sub-10nm Node
Authors:
- 12 May 2024
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1-4
Abstract
In order to sustain DRAM scaling trajectory below 10nm node, it is indispensable to adopt innovative cell structures, advanced processes and novel materials such as IGZO. In this paper, we will discuss promising candidates for IGZO-based DRAM cell architecture including vertical channel transistor (VCT), vertically stacked cell array transistor (VS-CAT) and capacitor-less two transistors (2T0C), and recent advances in key technologies including IGZO deposition, gate stack engineering, contact resistance, and so on.Keywords
This publication has 2 references indexed in Scilit:
- Novel Band-to-Band Tunneling Body Contact (BTBC) Structure to Suppress the Floating- Body Effect in a Vertical-Cell DRAMIEEE Electron Device Letters, 2018
- Measurement of transient effects in SOI DRAM/SRAM access transistorsIEEE Electron Device Letters, 1996