High-precision time-to-digital converter in a FPGA device
- 1 May 2009
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 283-286
Abstract
The construction and design process of a high-resolution time-interval measuring system implemented in a SRAM-based FPGA device is discussed in this paper. The TDC can increase the precision on the measurement by interpolating time within the system clock cycle. A two step phase interpolation has been performed, one based on the phase information delivered by the VIRTEX-5 DCM and thus providing a fine time, a second level phase interpolation was based on carry lines thus delivering an iper fine time measurement. We have designed and built a PCB hosting a Virtex-5 Xilinx FPGA. In this paper we show the main characteristics of the board and the performance achieved in terms of resolution.Keywords
This publication has 2 references indexed in Scilit:
- A high-resolution time-to-digital converter implemented in field-programmable-gate-arraysIEEE Transactions on Nuclear Science, 2006
- Review of methods for time interval measurements with picosecond resolutionMetrologia, 2003