Room temperature electroless plating copper seed layer process for damascene interlevel metal structures
Authors:
- Joseph P O’kellyJOJoseph P O’kelly
- Karen F MongeyKMKaren F Mongey
- Yveline GobilYGYveline Gobil
- Joaquin TorresJTJoaquin Torres
- Patrick V KellyPKPatrick V Kelly
- Gabriel M CreanGCGabriel M Crean
- 1 January 2000
- journal article
- Published by Elsevier in Microelectronic Engineering
- Vol. 50 (1-4) , 473-479
Abstract
No abstract availableThis publication has 8 references indexed in Scilit:
- The Electroless Copper Plating of Small Via HolesTransactions of the IMF, 1998
- High aspect ratio quarter-micron electroless copper integrated technologyMicroelectronic Engineering, 1997
- Damascene copper interconnects with polymer ILDsThin Solid Films, 1997
- Electrical properties of Ti/TiN films prepared by chemical vapor deposition and their applications in submicron structures as contact and barrier materialsThin Solid Films, 1997
- Copper-based metallization for ULSI circuitsMicroelectronic Engineering, 1996
- Electroless copper metallisation of titanium nitrideApplied Surface Science, 1995
- Electroless copper deposition for ULSIThin Solid Films, 1995
- Ohm resistivity of electroless copper layers as a function of their thicknessesJournal of Materials Science, 1995