Simultaneous switching ground noise calculation for packaged CMOS devices
Authors:
- R. SenthinathanRSR. Senthinathan
- J.L. PrinceJPJ.L. Prince
- 1 January 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 26 (11) , 1724-1728
Abstract
No abstract availableThis publication has 3 references indexed in Scilit:
- Computation of transients in lossy VLSI packaging interconnectionsIEEE Transactions on Components, Hybrids, and Manufacturing Technology, 1990
- Delta-I noise specification for a high-performance computing machineProceedings of the IEEE, 1985
- Computing Inductive Noise of Chip PackagesAT&T Bell Laboratories Technical Journal, 1984