Elimination of Common-Mode Voltages Based on Modified SVPWM in Five-Level ANPC Inverters
- 10 April 2018
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 34 (1) , 173-183
Abstract
In this paper, a novel space-vector pulse width modulation (SVPWM) technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter which produces a good output voltage performance and low dv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the DC-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results.Keywords
Funding Information
- National Research Foundation of Korea, funded by the Korea government (2014R1A2A1A11052748)
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