A Constant Damping Phase-Locked Loop for Enhancing Transient Stability of Grid-Following Inverter

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Abstract
When a large grid disturbance occurs, the grid-following inverter is prone to cause transient instability due to the weak damping or negative damping induced by a synchronous reference frame phase-locked loop. First, the transient instability mechanism and characteristics of grid-following inverters are analyzed. As the grid disturbance increases, the transient damping will decrease or even become negative, and the transient stability of the system will deteriorate. To address this issue, a constant damping phase-locked loop (CD-PLL) is proposed, which can achieve a constant positive damping control. Meanwhile, the working principle, characteristics, and design method of the proposed CD-PLL are introduced in detail. The proposed CD-PLL can not only enhance the transient stability of the system but also improve the dynamic performance. Finally, the theoretical analysis and the proposed CD-PLL are verified by simulation and experimental studies.
Funding Information
  • National Natural Science Foundation of China (62402124, 52307197)
  • Open Project Program of the Guangxi Key Laboratory of Digital Infrastructure (GXDINBC202402, GXDINBC202407)

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