The cache and memory subsystems of the IBM POWER8 processor
Authors:
- W. J. StarkeWSW. J. Starke
- J. StuecheliJSJ. Stuecheli
- D. M. DalyDDD. M. Daly
- J. S. DodsonJDJ. S. Dodson
- F. AuernhammerFAF. Auernhammer
- P. M. SagmeisterPSP. M. Sagmeister
- G. L. GuthrieGGG. L. Guthrie
- C. F. MarinoCMC. F. Marino
- M. SiegelMSM. Siegel
- B. BlanerBBB. Blaner
- 1 January 2015
- journal article
- Published by IBM in IBM Journal of Research and Development
- Vol. 59 (1) , 3:1-3:13
Abstract
No abstract availableThis publication has 15 references indexed in Scilit:
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