Performance Optimization and FPGA Implementation of Real-Time Tone Mapping
Authors:
- 5 August 2014
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems II: Express Briefs
- Vol. 61 (10) , 803-807
Abstract
This brief analyzes the performance of the hardware-based tone-mapping operators for compression of high-dynamic-range images. The bottlenecks of a tone-mapping system are determined, and a high-performance field-programmable gate array (FPGA) implementation of an operator is introduced. The operator utilizes a polynomial mapping technique, which is adaptive to the pixel values, thus preserving high-contrast areas. The technique is further optimized for the presented resource-efficient FPGA implementation. We show that the timing optimization does not reduce the image quality by obtaining a high peak signal-to-noise ratio of the resulting images. The timing comparison to the similar implementations shows 2.5 times increase in the achieved throughput, irrespective of the hardware platform.Keywords
Funding Information
- Science and Technology Division of the Swiss Federal Competence Center armasuisse
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