A Fine-Grain Variation-Aware Dynamic ${\rm Vdd}$-Hopping AVFS Architecture on a 32 nm GALS MPSoC
- 28 April 2014
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 49 (7) , 1475-1486
Abstract
In order to optimize global energy efficiency in the context of dynamic process, voltage and temperature variations in advanced nodes, a fine-grain adaptive voltage and frequency scaling architecture is proposed for multiprocessor systems-on-chip (MPSoC), where each processing element is an independent voltage-frequency island. This architecture has been implemented on a 32 nm globally asynchronous locally-synchronous MPSoC. It shows up to 18.2% energy gains thanks to local adaptability compared with a global dynamic voltage and frequency scaling approach using 25% timing margins between slow and nominal process, by reducing margins to 60 ps of the real process. These gains are obtained for a total area overhead of 10% including local frequency/voltage actuators, sensors, and digital controller.Keywords
This publication has 21 references indexed in Scilit:
- An Efficient and Flexible Hardware Support for Accelerating Synchronization Operations on the STHORM Many-Core Architecture2013
- Thermal signature2011
- A fully-asynchronous low-power framework for GALS NoC integration2010
- RazorII: In Situ Error Detection and Correction for PVT and SER ToleranceIEEE Journal of Solid-State Circuits, 2008
- Variation-Aware Adaptive Voltage Scaling SystemIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2007
- A Self-Tuning DVS Processor Using Delay-Error Detection and CorrectionIEEE Journal of Solid-State Circuits, 2006
- A time-to-digital-converter-based CMOS smart temperature sensorIEEE Journal of Solid-State Circuits, 2005
- Dynamic voltage and frequency management for a low-power embedded microprocessorIEEE Journal of Solid-State Circuits, 2005
- On-Die Droop Detector for Analog Sensing of Power Supply NoiseIEEE Journal of Solid-State Circuits, 2004
- Variable supply-voltage scheme for low-power high-speed CMOS digital designIEEE Journal of Solid-State Circuits, 1998