Characterization and modeling of stacked MIM on‐chip capacitors with high‐capacitance density up to 20 GHz frequency region

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Abstract
In this article, double‐stacked and triple‐stacked metal‐insulator‐metal (MIM) capacitors fabricated in 0.18 μm CMOS process are reported. These provide high‐capacitance density of 2 fF/μm2 and 3.2 fF/μm2 and excellent dc and RF characteristics, respectively. The lumped circuit model of the stacked MIM capacitors is presented for high‐frequency applications up to 20 GHz. The stacked MIM capacitors offer a reduced chip area for a given capacitance value and are expected to be a viable choice for integration of RF/mixed‐mode circuits in a single chip. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 1235–1238, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24305
Funding Information
  • Pusan National University research grant