A Comparative Study of Performance of AES Final Candidates Using FPGAs
Authors:
- 1 January 2000
- book chapter
- Published by Springer Nature
- p. 125-140
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalistsIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2001
- The Block Cipher BKSQ2000
- Efficiency testing of ANSI C implementations of round 1 candidate algorithms for the advanced encryption standard1999
- FPGA and CPLD architectures: a tutorialIEEE Design & Test of Computers, 1996
- Architecture of field-programmable gate arraysProceedings of the IEEE, 1993