Modeling and Verification of Asynchronous Systems Using Timed Integrated Model of Distributed Systems
Open Access
Abstract
In modern computer systems, distributed systems play an increasingly important role, and modeling and verification are crucial in their development. The specificity of many systems requires taking this into account in real time, as time dependencies significantly affect the system’s behavior, when achieving the goals of its processes or with adverse phenomena such as deadlocks. The natural features of distributed systems include the asynchrony of actions and communication, the autonomy of nodes, and the locality of behavior, i.e., independence from any global or non-local features. Most modeling formalisms are derived from parallel centralized systems, in which the behavior of components depends on the global state or the simultaneous achievement of certain states by components. This approach is unrealistic for distributed systems. This article presents the formalism of a timed integrated model of distributed systems that supports all of the mentioned features. The formalism is based on the relation between the states of the distributed nodes and the messages of distributed computations, called agents. This relation creates system actions. A specification in this formalism can be translated into timed automata, the most popular formalism for specifying and verifying timed parallel systems. The translation rules ensure that the semantics of T-IMDS and timed automata are consistent, allowing use of the Uppaal validator for system verification. The development of general formulas for checking the deadlock freedom and termination efficiency allows for automated verification, without learning temporal logics and time-dependent formulas. An important and rare feature is the finding of partial deadlocks, because in a distributed system a common situation occurs in which some nodes/processes are deadlocked, while others work. Examples of checking timed distributed systems are included.Keywords
This publication has 43 references indexed in Scilit:
- Developing UPPAAL over 15 yearsSoftware: Practice and Experience, 2011
- Structural translation from Time Petri Nets to Timed AutomataJournal of Systems and Software, 2006
- Model Checking of Time Petri Nets Using the State Class Timed AutomatonDiscrete Event Dynamic Systems, 2006
- Efficient timed model checking for discrete-time systemsTheoretical Computer Science, 2006
- NUSMV: a new symbolic model checkerInternational Journal on Software Tools for Technology Transfer, 2000
- Formal verification in hardware designACM Transactions on Design Automation of Electronic Systems, 1999
- The model checker SPINIEEE Transactions on Software Engineering, 1997
- A theory of timed automataTheoretical Computer Science, 1994
- OCCAMACM SIGPLAN Notices, 1983
- Formal verification of parallel programsCommunications of the ACM, 1976