Dynamic On-Resistance in GaN Power Devices: Mechanisms, Characterizations, and Modeling
Top Cited Papers
- 26 June 2019
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Emerging and Selected Topics in Power Electronics
- Vol. 7 (3) , 1425-1439
Abstract
Gallium nitride (GaN) power devices enable power electronic systems with enhanced power density and efficiency. Dynamic on-resistance (R ON ) degradation (or current collapse), originating from buffer trapping, surface trapping and gate instability, has been regarded as a primary challenge for the lateral GaN-on-Si power devices. In this paper, we present an overview and discussion of the mechanisms, characterizations, modeling, and solutions for the degradation of dynamic R ON in GaN power devices. The complex dynamics of acceptor/donor buffer traps and their impacts on dynamic R ON have been analyzed and revealed by TCAD simulations and high-voltage back-gating measurements. The gate instability-induced dynamic R ON increase in different GaN device technologies and the role of gate overdrive are also discussed. Wafer-level and board-level characterization techniques enabling accurate dynamic R ON evaluation are reviewed. The dynamic R ON performance of the state-of-the-art commercial GaN devices is presented, and a behavioral model with the dynamic R ON degradation taken into consideration has been implemented for circuit analysis. The latest progress in GaN device technologies for enhanced dynamic performance is also reviewed and discussed.Keywords
Funding Information
- National Basic Research Program of China (2018YFB0104601)
- National Natural Science Foundation of China (51807175)
- Fundamental Research Funds for the Central Universities (2019QNA4025)
- Hong Kong Innovation Technology Fund (ITS/412/17FP)
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