An innovative open-loop CDR based on injection-locked oscillator for high-speed data link applications
Authors:
- J.-B. BegueretJBJ.-B. Begueret
- Y. DevalYDY. Deval
- C. ScarabelloCSC. Scarabello
- J.-Y. Le GallJGJ.-Y. Le Gall
- M. PignolMPM. Pignol
- 1 October 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 3 references indexed in Scilit:
- HiperLAN 5.4-GHz low-power CMOS synchronous oscillatorIEEE Transactions on Microwave Theory and Techniques, 2001
- A 2-1600-MHz CMOS clock recovery PLL with low-Vdd capabilityIEEE Journal of Solid-State Circuits, 1999
- A novel clock recovery circuit for fully monolithic integrationIEEE Transactions on Microwave Theory and Techniques, 1999