Effect of cryogenic temperature characteristics on 0.18-μm silicon-on-insulator devices

This publication has 24 references indexed in Scilit:

• Cryogenic Lifetime Studies of 130 nm and 65 nm nMOS Transistors for High-Energy Physics Experiments
  IEEE Transactions on Nuclear Science, 2015
• Single event transients in a 0.18 m partially-depleted silicon-on-insulator complementary metal oxide semiconductor circuit
  Acta Physica Sinica, 2015
• Development of Low Power Cryogenic Readout Integrated Circuits Using Fully-Depleted-Silicon-on-Insulator CMOS Technology for Far-Infrared Image Sensors
  Journal of Low Temperature Physics, 2012
• Power Electronic Components, Circuits and Systems for Deep Space Missions
  2006
• CMOS reliability issues for emerging cryogenic Lunar electronics applications
  Solid-State Electronics, 2006
• Characterization and Modeling of Silicon CMOS Transistor Operation at Low Temperature
  Journal de Physique IV, 1996
• Low temperature CMOS-a brief review
  IEEE Transactions on Components, Hybrids, and Manufacturing Technology, 1992
• Improved MODFET performance through ion implantation in the gate region
  IEEE Electron Device Letters, 1987
• Short-channel effects in MOSFET's at liquid-Nitrogen temperature
  IEEE Transactions on Electron Devices, 1986
• Very small MOSFET's for low-temperature operation
  IEEE Transactions on Electron Devices, 1977