Transistor characteristics with Ta/sub 2/O/sub 5/ gate dielectric
Authors:
- Ya-Chin KingYKYa-Chin King
- Qiang LuQLQiang Lu
- Tsu-Jae KingTKTsu-Jae King
- Chenming HuCHChenming Hu
- A. KalnitskyAKA. Kalnitsky
- Sing-Pin TaySTSing-Pin Tay
- Chia-Cheng ChengCCChia-Cheng Cheng
- 1 November 1998
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 19 (11) , 441-443
Abstract
As the gate oxide thickness decreases below 2 nm, the gate leakage current increases dramatically due to direct tunneling current. This large gate leakage current will be an obstacle to reducing gate oxide thickness for the high speed operation of future devices. A MOS transistor with Ta/sub 2/O/sub 5/ gate dielectric is fabricated and characterized as a possible replacement for MOS transistors with ultra-thin gate silicon dioxide. Mobility, I/sub d/-V/sub d/, I/sub d/-V/sub g/, gate leakage current, and capacitance-voltage (C-V) characteristics of Ta/sub 2/O/sub 5/ transistors are evaluated and compared with SiO/sub 2/ transistors. The gate leakage current is three to five orders smaller for Ta/sub 2/O/sub 5/ transistors than SiO/sub 2/ transistors.Keywords
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