The UCSC Kestrel parallel processor

Authors:
  • DDD.M. Dahle
    D.M. Dahle
  • MDM. Diekhans
    M. Diekhans
  • LGL. Grate
    L. Grate
  • JHJ. Hirschberg
    J. Hirschberg
  • KKK. Karplus
    K. Karplus
  • HKH. Keller
    H. Keller
  • MKM. Kendrick
    M. Kendrick
  • FMF.J. Mesa-Martinez
    F.J. Mesa-Martinez
  • DPD. Pease
    D. Pease
  • ERE. Rice
    E. Rice
  • ASA. Schultz
    A. Schultz
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Abstract
The architectural landscape of high-performance computing stretches from superscalar uniprocessor to explicitly parallel systems, to dedicated hardware implementations of algorithms. Single-purpose hardware can achieve the highest performance and uniprocessors can be the most programmable. Between these extremes, programmable and reconfigurable architectures provide a wide range of choice in flexibility, programmability, computational density, and performance. The UCSC Kestrel parallel processor strives to attain single-purpose performance while maintaining user programmability. Kestrel is a single-instruction stream, multiple-data stream (SIMD) parallel processor with a 512-element linear array of 8-bit processing elements. The system design focuses on efficient high-throughput DNA and protein sequence analysis, but its programmability enables high performance on computational chemistry, image processing, machine learning, and other applications. The Kestrel system has had unexpected longevity in its utility due to a careful design and analysis process. Experience with the system leads to the conclusion that programmable SIMD architectures can excel in both programmability and performance. This work presents the architecture, implementation, applications, and observations of the Kestrel project at the University of California at Santa Cruz.

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