Cracks in the Memory Wall: Data Systems On Disaggregated Memory

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Abstract
The growing disparity between processor core scaling and memory bandwidth has exposed the physical and economic limits of processor-centric database architectures. While Compute Express Link (CXL) and other emerging technologies enable a necessary shift toward memory-centric, disaggregated topologies, it also introduces unprecedented complexity in data movement across storage hierarchies and high-speed interconnects. This paper explores the transition to memory-centric database designs, arguing that static query execution strategies are increasingly brittle in the face of shifting hardware bottlenecks. By synthesizing recent visions of disaggregated architectures with advances in throughput-guided data movement, we outline a scalable path forward. We demonstrate how runtime adaptation can dynamically navigate the trade-offs between direct transfers, data staging, and near-storage compute, ultimately maximizing interconnect bandwidth and query performance in next-generation memory-centric cloud deployments.
Funding Information
  • Staatssekretariat für Bildung, Forschung und Innovation (MB25.00023)
  • EPFL Lausanne

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