Hierarchical verification of asynchronous circuits using temporal logic
Authors:
- B. MishraBMB. Mishra
- E. ClarkeECE. Clarke
- 1 January 1985
- journal article
- Published by Elsevier in Theoretical Computer Science
- Vol. 38, 269-291
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Introduction to VLSI systemsMicroelectronics Reliability, 1986
- Hardware Specification with Temporal Logic: An ExampleIEEE Transactions on Computers, 1982
- Temporal Specifications of Self-Timed Systems1981