System Architecture and Software Stack for GDDR6-AiM

Authors:
  • YKYongkee Kwon
    Yongkee Kwon
  • KVKornijcuk Vladimir
    Kornijcuk Vladimir
  • NKNahsung Kim
    Nahsung Kim
  • WSWoojae Shin
    Woojae Shin
  • JWJongsoon Won
    Jongsoon Won
  • MLMinkyu Lee
    Minkyu Lee
  • HJHyunha Joo
    Hyunha Joo
  • HCHaerang Choi
    Haerang Choi
  • GKGuhyun Kim
    Guhyun Kim
  • BAByeongju An
    Byeongju An
  • JKJeongbin Kim
    Jeongbin Kim
  • JLJaewook Lee
    Jaewook Lee
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Abstract
This poster presents system architecture, software stack, and performance analysis for SK hynix’s very first GDDR6-based processing-in-memory (PIM) product sample, called Accelerator-in-Memory (AiM).AiM is designed for the in-memory acceleration of matrix-vector product operations, which are commonly found in machine learning applications. The strength of AiM primarily comes from the two design factors, which are 1) all-bank operation support and 2) extended DRAM command set. All-bank operations allow AiM to fully utilize the abundant internal DRAM bandwidth, which makes it an attractive solution for memory-bound applications. The extended command set allows the host to address these new operations efficiently and provides a clean separation of concerns between the AiM architecture and its software stack design.We present a dedicated FPGA-based reference platform with a software stack, which is used to validate AiM design and evaluate its system-level performance. We also demonstrate FMC-based AiM extension cards that are compatible with the off-the-shelf FPGA boards and serve as an open research platform allowing potential collaborators and academic institutes to access our hardware and software systems.