Multi-way VLSI Circuit Partitioning Based On Dual Net Representation
Authors:
- J. CongJCJ. Cong
- W. LubioWLW. Lubio
- N. ShivakumurNSN. Shivakumur
- 1 January 1994
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 10636757,p. 56-62
Abstract
No abstract availableKeywords
This publication has 14 references indexed in Scilit:
- Acyclic multi-way partitioning of Boolean networks1994
- Spectral K-way ratio-cut partitioning and clustering1993
- New spectral methods for ratio cut partitioning and clusteringIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992
- A new approach to effective circuit clustering1992
- A probabilistic multicommodity-flow solution to circuit clustering problems1992
- A general purpose multiple way partitioning algorithm1991
- Multiple-way network partitioningIEEE Transactions on Computers, 1989
- An Improved Min-Cut Algonthm for Partitioning VLSI NetworksIEEE Transactions on Computers, 1984
- Optimization by Simulated AnnealingScience, 1983
- An Efficient Heuristic Procedure for Partitioning GraphsBell System Technical Journal, 1970