A 100-μW wake-up receiver for UHF transceiver

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Abstract
A wake-up receiver may be used in UHF-Transceiver to control duty cycle. However, its power dissipation must be extremely low to minimize the power consumption of the overall chip. This paper describes the design of a sub-GHz receiver using the “uncertain-IF” architecture, which combines Passive Mixer and a ring oscillator as the RF LO. The wake-up receiver is implemented in 180 nm CMOS technology to achieve a sensitivity of -55 dBm at 50 kbps with 100 μW power consumption from the 1 V supply.

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