Methodology for switching characterization evaluation of wide band-gap devices in a phase-leg configuration
- 1 March 2014
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 10482334,p. 2534-2541
Abstract
Double pulse tester (DPT) is a widely accepted method to evaluate the switching behavior of power devices. Considering the high switching-speed capability of wide band-gap (WBG) devices, the test results become significantly sensitive to the alignment of voltage and current (V-I) measurement. Also, because of the shoot-through current induced by Cdv/dt, during the switching transient of one device, the switching losses of its complementary device in the phase-leg is non-negligible. This paper summarizes the key issues of DPT, including layout design, measurement considerations, grounding effects and data processing. Among them, the latest probes for switching waveform measurement are compared, the methods of V-I alignment are discussed, and the impact of grounding effects induced by probes on switching waveforms are investigated. Also, for the WBG devices in a phase-leg configuration, a practical method is proposed for switching loss evaluation by calculating the difference between the input energy supplied by a dc capacitor and the output energy stored in a load inductor. Based on a phase-leg power module built with 1200 V SiC MOSFETs, the test results show that regardless of V-I timing alignment, this method can accurately indicate the switching losses of both the upper and lower switches by detecting only one switching current.Keywords
This publication has 15 references indexed in Scilit:
- Understanding the effect of PCB layout on circuit performance in a high frequency gallium nitride based point of load converter2013
- Analysis of the switching speed limitation of wide band-gap devices in a phase-leg configuration2012
- Analysis and design optimization of brushless DC motor's driving circuit considering the Cdv/dt induced effect2010
- Experimental parametric study of the parasitic inductance influence on MOSFET switching characteristics2010
- Characterization of $Cdv/dt$ Induced Power Loss in Synchronous Buck DC–DC ConvertersIEEE Transactions on Power Electronics, 2007
- $DV/DT$Related Spurious Gate Turn-On of Bidirectional Switches in a High-Frequency CycloconverterIEEE Transactions on Power Electronics, 2005
- Analytical modeling and experimental evaluation of interconnect parasitic inductance on MOSFET switching characteristics2004
- Switching disturbance due to source inductance for a power MOSFET: analysis and solutions2002
- The dV/dt capability of MOS-gated thyristorsIEEE Transactions on Power Electronics, 1998
- Integration of high frequency current shunts in power electronic circuitsIEEE Transactions on Power Electronics, 1995