Supremica - An integrated environment for verification, synthesis and simulation of discrete event systems
Authors:
- Knut AkessonKAKnut Akesson
- Martin FabianMFMartin Fabian
- Hugo FlordalHFHugo Flordal
- Robi MalikRMRobi Malik
- 1 January 2006
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 384-385
Abstract
An integrated environment, Supremica, for verification, synthesis and simulation of discrete event systems is presented. The basic model in Supremica is finite automata where the transitions have an associated event together with a guard condition and an action function that updates automata variables. Supremica uses two main approaches to handle large state-spaces. The first approach exploits modularity in order to divide the original problem into many smaller problems that together solve the original problem. The second approach uses an efficient data structure, a binary decision diagram, to symbolically represent the reachable states. Models in Supremica may be simulated in the environment. It is also possible to generate code that implements the behavior of the model using both the IEC 61131 and the IEC 61499 standardKeywords
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