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  1. Home
  2. Publications
  3. Test scheduling for core-based systems using mixed-integer linear programming
  1. Home
  2. Publications
  3. Test scheduling for core-based systems using mixed-integer linear programming

Test scheduling for core-based systems using mixed-integer linear programming

Author:
  • KCK. Chakrabarty
    K. Chakrabarty

Open Access
Publisher website
Google Scholar
  • 1 January 2000
    • journal article
    • Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
    • Vol. 19  (10) , 1163-1174
    • DOI:10.1109/43.875306
Abstract
No abstract available

This publication has 9 references indexed in Scilit:

  • A structured test re-use methodology for core-based system chips
    2002
  • A novel test methodology for core-based system LSIs and a testing time minimization problem
    2002
  • Scan chain design for test time reduction in core-based ICs
    2002
  • Testing embedded-core based system chips
    2002
  • A structured and scalable mechanism for test access to embedded reusable cores
    2002
  • A low overhead design for testability and test generation technique for core-based systems
    2002
  • Design of system-on-a-chip test access architectures using integer linear programming
    2002
  • Design of system-on-a-chip test access architectures under place-and-route and power constraints
    2000
  • Open Shop Scheduling to Minimize Finish Time
    Journal of the ACM, 1976

Publications with shared reference occurs when two publications share one or more common references. This publication has 1079 Publications with shared reference indexed in Scilit, top 10 records with the most shared references are listed below:

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Cited by 161 articles
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