Macromodeling and Optimization of Digital MOS VLSI Circuits
Authors:
- MatsonMAMatson
- L.A. GlasserLGL.A. Glasser
- 1 October 1986
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 5 (4) , 659-678
Abstract
No abstract availableThis publication has 11 references indexed in Scilit:
- Switch-Level Delay Models for Digital MOS VLSI1984
- Delay and Power Optimization in VLSI Circuits1984
- Signal Delay in RC Tree NetworksIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1983
- Optimal short-term scheduling of large-scale power systemsIEEE Transactions on Automatic Control, 1983
- Timing Analysis for nMOS VLSI1983
- Projected Newton Methods for Optimization Problems with Simple ConstraintsSIAM Journal on Control and Optimization, 1982
- A survey of optimization techniques for integrated-circuit designProceedings of the IEEE, 1981
- Abstraction mechanisms in CLUCommunications of the ACM, 1977
- A Rapidly Convergent Descent Method for MinimizationThe Computer Journal, 1963
- The Transient Response of Damped Linear Networks with Particular Regard to Wideband AmplifiersJournal of Applied Physics, 1948