Random telegraph noise in flash memories - model and technology scaling
Authors:
- 1 January 2007
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 01631918,p. 169-172
Abstract
This paper presents the first statistical model of Vt fluctuation (ΔVt cell ) in a floating-gate flash memory due to random telegraph noise. It considers current-path percolation, which generates a large-amplitude-noise tail, caused by dopant induced surface potential non-uniformity It concludes that the impact of scaling is weaker than the widely-accepted 1/L eff W eff trend. 3-σ ΔVt cell is estimated to increase by 1.8x rather than ≫10x from 90 nm to 20 nm technology nodes.Keywords
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