14.7 In-situ techniques for in-field sensing of NBTI degradation in an SRAM register file
Authors:
- 1 February 2015
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1-3
Abstract
SRAM register files have sensitive circuitry and often operate with high switching activity and at high temperature. This makes them particularly vulnerable to aging by negative-bias temperature instability (NBTI) degradation of their PMOS devices. We propose a technique to sense this aging degradation; it is an in-situ technique sensing the threshold voltage (Vt) of PMOSs directly in bitcells, and can operate in-field, thanks to the ability to sense V, robustly across temperature and voltage variations. This technique can be foundational for several dynamic reliability management (DRM) approaches, including: 1) sensing V, values periodically (e.g., every several months) for evaluating the amount and the rate of NBTI degradation; 2) sensing V, differences between two PMOSs in a bitcell to determine their strength skew and to estimate the minimum functional voltage (VMIN) degradation; and, 3) using the skew information across bitcells to create recovery vectors, which can be used to recover the aged PMOSs and thereby rebalance the skews. Existing in-situ techniques using ring oscillators or current sensors to sense bitcell reliability and performance cannot support in-field operation, which is a critical issue for DRM since it is impractical to control environmental parameters, particularly temperature, during sensing.Keywords
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