A Deep Insight Into the Impact of Bipolar Degradations on Avalanche Robustness of 4H-SiC MOSFETs

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Abstract
The avalanche robustness of silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors (MOSFETs) is a crucial issue for their widespread applications, especially in the aging process. In this article, the avalanche capability of commercial 1.7-kV 4H-SiC MOSFETs during bipolar degradation is qualitatively and quantitatively evaluated by unclamped inductive switching (UIS) tests. Notably, the avalanche withstand energy is age-dependent rather than static and decreases gradually with the aging of the device. Technology computer-aided design (TCAD) simulations are utilized to model the bipolar degradation of the SiC MOSFETs and to explore the effects on device avalanche characteristics. In addition, the degraded SiC MOSFETs are decapsulated to examine the failure points at the die level. Moreover, the avalanche dynamic safe operating area (A-DSOA) of the device is characterized throughout its life cycle, and it shrinks with increasing junction temperature and aging degree. The relevant analysis method and A-DSOA can be used to accurately evaluate and quantitatively predict the avalanche withstand capability of SiC MOSFETs.
Funding Information
  • National Natural Science Foundation of China (U22A20226)
  • State Grid Corporation of China through the Science and Technology Project (522000220036)

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