Hyper Dimensional Computing with Ferroelectric Tunneling Junctions

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Abstract
Hyper Dimensional Computing is a new approach in artificial intelligence (AI). The specific requirements of massive parallel readout operation during HDC inference makes the high-impedance ferroelectric tunneling junction (FTJ) devices a very interesting candidate for the hardware realization of a HDC accelerator. Therefore, we propose to research both, the technological and the architectural constraints when bringing together this two distinct concepts from the architectural and the devices perspective.